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| QS52805T/AT GUARANTEED LOW SKEW CMOS CLOCK DRIVER/BUFFER INDUSTRIAL TEMPERATURE RANGE GUARANTEED LOW SKEW CMOS CLOCK DRIVER/BUFFER FEATURES: - - 10 output, low skew signal buffer Guaranteed low skew: * 0.7ns output skew (same bank) * 0.9ns output skew (different bank) * 1ns part-to-part skew 25 on-chip resistors available for low noise Input hysteresis for better noise margin Monitor output Undershoot clamp diodes on all inputs Std. and A speed grades Available in QSOP and SOIC packages QS52805T/AT DESCRIPTION The QS52805T clock buffer/driver circuits can be used for clock buffering schemes where low skew is a key parameter. This device offers two banks of five non-inverting outputs. This device provides low propagation delay buffering with on-chip skew of 0.7ns for same-transition, same-bank signals. The QS52805T has on-chip series termination resistors for lower noise clock signals. The QS52805T series resistor version is recommended for driving unterminated lines with capacitive loading and other noise sensitive clock distribution circuits. These clock buffer products are designed for use in high-performance workstations and in embedded and personal computing systems. Several devices can be used in parallel or scattered throughout a system for guaranteed low skew, system-wide clock distribution networks. The QS52805T is characterized for operation at -40C to +85C. - - - - - - FUNCTIONAL BLOCK DIAGRAM OEA 5 INA OA 5 OA 1 MON 5 INB OB 5 OB 1 OEB NOTE: This device has 25 series termination resistors on each clock output including monitor. INDUSTRIAL TEMPERATURE RANGE 1 c 1999 Integrated Device Technology, Inc. AUGUST 2000 DSC-5480/- QS52805T/AT GUARANTEED LOW SKEW CMOS CLOCK DRIVER/BUFFER INDUSTRIAL TEMPERATURE RANGE PIN CONFIGURATION VCCA OA1 OA2 OA3 G NDA OA4 OA5 G N DQ O EA INA 1 2 3 4 5 6 7 8 9 10 SO20-2 SO20-8 20 19 18 17 16 15 14 13 12 11 VCCB O B1 O B2 O B3 G NDB O B4 O B5 MON O EB INB ABSOLUTE MAXIMUM RATINGS Symbol VTERM(2) VTERM(3) VAC IOUT TSTG TJ Description Supply Voltage to Ground DC Output Voltage VOUT DC Input Voltage VIN AC Input Voltage (pulse width 20ns) DC Input Diode Current VIN < 0 DC Output Current Max. Sink Current/Pin Storage Temperature Junction Temperature (1) Unit V V V V mA mA C C Max. - 0.5 to +7 - 0.5 to +7 - 0.5 to +7 -3 -20 120 - 65 to +150 150 QSOP/ SOIC TOP VIEW NOTES: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. 2. Vcc Terminals. 3. All terminals except Vcc. CAPACITANCE Pins CIN COUT (TA = +25OC, f = 1.0MHz, VIN = 0V) Max. (1) 6 9 Unit pF pF Typ. 4 7 NOTE: 1. This parameter is guaranteed but not production tested. PIN DESCRIPTION Pin Names OEA, OEB INA, INB OAn, OBn MON I/O I I O O Description Output Enable Inputs Clock Inputs Clock Outputs Unbuffered Monitor Output 2 QS52805T/AT GUARANTEED LOW SKEW CMOS CLOCK DRIVER/BUFFER INDUSTRIAL TEMPERATURE RANGE DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE Following Conditions Apply Unless Otherwise Specified: Industrial: TA = -40C to +85C, VCC = 5.0V 10% Symbol VIH VIL VIC VOH VOL IIN IOFF IOZ IOS VT ROUT Parameter Input HIGH Voltage Input LOW Voltage Clamp Diode Voltage Output HIGH Voltage Output LOW Voltage Input Leakage Current Input/Output Power Off Leakage Output Leakage Current Short Circuit Current Input Hysteresis Output Resistance (2,3) (3) Test Conditions Guaranteed Logic HIGH for All Inputs Guaranteed Logic LOW for All Inputs Vcc = Min., IIN = -18mA Vcc = Min., IOH = -12mA Vcc = Min., IOL = 12mA Vcc = Max., VIN = Vcc or GND Vcc = 0V, VIN or VOUT = Vcc or GND Vcc = Max., VOUT = Vcc or GND Vcc = Max., VOUT = GND VTLH - VTHL for All Inputs Vcc = Min., IOL = 12mA Min. 2 -- -- 2.4 -- -- -- -- Typ.(1) -- -- -0.7 -- -- -- -- -- -- 0.2 28 Max. -- 0.8 -1.2 -- 0.5 1 1 1 -250 -- -- Unit V V V V V A A A mA V -60 -- -- NOTES: 1. Typical values are at VCC = 5.0V, TA = 25C. 2. Not more than one output should be used to test this high power condition. Duration is less than one second. 3. Guaranteed by design but not tested. POWER SUPPLY CHARACTERISTICS Symbol ICC ICC ICCD IC Parameter Quiescent Power Supply Current Supply Current per Input HIGH Dynamic Power Supply Current per Output (2) Total Power Supply Current Examples (2,4) Test Conditions (1) VCC = Max., VIN = GND or Vcc VCC = Max., VIN = 3.4V, fI = 0MHz VCC = Max., VIN = GND or Vcc Outputs Enabled, 50% duty cycle VCC = Max., OEA = OEB = GND 50% duty cycle, fI = 10MHz Five outputs toggling Unused inputs = GND or Vcc VCC = Max., OEA = OEB = GND 50% duty cycle, fI = 2.5MHz All outputs toggling Typ. (3) 0.005 1 0.08 VIN = GND or Vcc VIN = GND or 3.4V 6.6 7.2 Max. 0.5 2.5 0.18 9.5 10.8 Unit mA mA mA/MHz mA VIN = GND or Vcc VIN = GND or 3.4V 4.3 5.6 5.5 8 NOTES: 1. For conditions shown as Min. or Max., use the appropriate values specified under DC Electrical Characteristics. 2. Guaranteed by design but not tested. CL = 0pF. 3. Typical values are for reference only. Conditions are VCC = 5.0V, TA = 25C. 4. IC = ICC + (ICC)(DH)(NT) + ICCD (fO)(NO) where: DH = Input Duty Cycle NT = Number of TTL HIGH inputs at DH (one or two) fO = Output Frequency NO = Number of outputs at fO 3 QS52805T/AT GUARANTEED LOW SKEW CMOS CLOCK DRIVER/BUFFER INDUSTRIAL TEMPERATURE RANGE SKEW CHARACTERISTICS OVER OPERATING RANGE TA = -40C to +85C, VCC = 5.0V 10% CLOAD = 50pF (no resistor) QS52805T Symbol tSK(01) tSK(02) tSK(P) tSK(T) Parameter (1) Skew between two outputs, same transition, same bank Skew between two outputs, same transition, different banks Pulse Skew; opposite transition skew, same output (tPHL - tPLH) Part-to-part skew (2) Min. -- -- -- -- Max. 0.7 0.9 1 1.5 Min. -- -- -- -- QS52805AT Max. 0.7 0.9 1 1 Unit ns ns ns ns NOTES: 1. Skew parameters are guaranteed across temperature range, but not tested. Skew parameters apply to propagation delays only. 2. tSK(T) only applies to devices of the same transition, part type, temperature, power supply voltage, loading, package, and speed grade. SWITCHING CHARACTERISTICS OVER OPERATING RANGE TA = -40C to +85C, VCC = 5.0V 10% CLOAD = 50pF (no resistor) QS52805T Symbol tPLH tPHL tPZL tPZH tPLZ tPHZ tR tF Parameter (1) Propagation Delay (2) Output Enable Time Output Disable Time Output Rise Time, 0.8V to 2V (3) Output Fall Time, 2V to 0.8V (3) Min. 1.5 1.5 1.5 -- -- Max. 6.5 8 7 1.5 1.5 Min. 1.5 1.5 1.5 -- -- QS52805AT Max. 5.8 8 7 1.5 1.5 Unit ns ns ns ns ns NOTES: 1. Minimums guaranteed but not production tested. 2. The propagation delay other range indicated by Min. and Max. specifications results from process and environmental variables. These propagation delays do not imply limit skew. 3. This parameter is guaranteed but not tested. 4 QS52805T/AT GUARANTEED LOW SKEW CMOS CLOCK DRIVER/BUFFER INDUSTRIAL TEMPERATURE RANGE TEST CIRCUITS AND WAVEFORMS Parameter Tested Switch Position tPLZ, tPZL All Others VCC VIN Pulse Generator 50 DUT 50pF 500 VOUT 500 Closed Open 6.0 V Pulse generator for all pulses: f 1.0MHz; tF 2.5ns; tR 2.5ns PROPAGATION DELAY 3V INPUT tPLH tPHL VOH 2.0V 1.5V 0.8V VOL tR tF 1.5V 0V INPUT PULSE SKEW -- tSK(P) 3V 1.5V 0V tPLH OUTPUT tPHL VOH 1.5V VOL tSK(p) = tPHL - tPLH OUTPUT OUTPUT SKEW (SAME BANK) -- tSK(O1) 3V INPUT tPLH1 tPHL1 VOH OUTPUT 1 1.5V VOL tSK(01) OUTPUT 2 tSK(01) VOH 1.5V VOL tPLH2 tPHL2 1.5V 0V INPUT OUPUT SKEW (DIFFERENT BANKS) -- tSK(O2) 3V 1.5V 0V tPLHA tPHLA VOH OUTPUT A 1.5V VOL tSK(02) OUTPUT B tSK(02) VOH 1.5V VOL tPLHB tPHLB tSK(01) = tPLH2 - tPLH1 or tPHL2 - tPHL1 tSK(02) = tPLHB - tPLHA or tPHLB - tPHLA ENABLE AND DISABLE TIMES ENABLE CONTROL INPUT tPZL OUTPUT NORMALLY LOW SWITCH CLOSED tPZH OUTPUT NORMALLY HIGH SWITCH OPEN 1.5V 0V tPLZ 3V 1.5V 0.3V VOL tPHZ 0.3V VOH PART 2 OUTPUT PART 1 OUTPUT DISABLE 3V 1.5V 0V INPUT PART-TO-PART SKEW -- tSK(T) 3V 1.5V 0V tPLH1 tPHL1 VOH 1.5V VOL tSK(t) tSK(t) VOH 1.5V VOL tPLH2 tPHL2 tSK(t) = tPLH2 - tPLH1 or tPHL2 - tPHL1 5 QS52805T/AT GUARANTEED LOW SKEW CMOS CLOCK DRIVER/BUFFER INDUSTRIAL TEMPERATURE RANGE ORDERING INFORMATION QS XXXX Device Type XX Package Q SO Quarter Size Small Outline Package (SO20-8) Small Outline IC (SO20-2) Guaranteed Low Skew CMOS Clock Driver/Buffer 52805T 52805AT CORPORATE HEADQUARTERS 2975 Stender Way Santa Clara, CA 95054 for SALES: 800-345-7015 or 408-727-6116 fax: 408-492-8674 www.idt.com* *To search for sales office near you, please click the sales button found on our home page or dial the 800# above and press 2. The IDT logo, QuickSwitch, and SynchroSwitch are registered trademarks of Integrated Device Technology, Inc. 6 |
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